1, BGA (ball grid array)
Spherical contact display, one of the surface mount packages. A spherical bump is formed on the back surface of the printed circuit board in place of the pin, and the LSI chip is mounted on the front surface of the printed circuit board, and then sealed by a molding resin or a potting method. Also known as the bump display carrier (PAC). Pin can be more than 200, is a multi-pin LSI with a package. The package body can also be made smaller than the QFP (quad flat package). For example, the pin center distance of 1.5mm 360-pin BGA is only 31mm square; and the pin center distance of 0.5mm 304-pin QFP for 40mm square. And BGA do not have to worry about QFP pin deformation problems. The package was developed by Motorola in the United States, first in the portable phone and other equipment used in the future in the United States
May be popular in personal computers. Initially, the BGA pin (bump) center distance is 1.5mm, the number of pins is 225. Now there are some LSI manufacturers are developing 500-pin BGA. The problem with the BGA is the appearance check after reflow. It is not clear whether the effective appearance inspection method. Some believe that, due to the larger center of the welding, the connection can be refern as stable, only through functional checks to deal with. Motorola's company sealed the package with a molded resin called OMPAC, and the encapsulation method sealed package called
GPAC (refer OMPAC and GPAC).
2, BQFP (quad flat package with bumper)
Four-side pin with cushion pad flat package. One of the QFP packages, the protrusions (cushions) are provided at the four corners of the package body to prevent the pins from being bent during transport. US semiconductor manufacturers mainly in the microprocessor and ASIC circuits such as the use of this package. Pin center distance 0.635mm, pin number from 84 to 196 or so (refer QFP).
3, solder bump PGA (butt joint pin grid array) surface mount type PGA nickname (refer surface mount type PGA).
4, C- (ceramic)
Indicates the symbol of the ceramic package. For example, CDIP represents ceramic DIP. Is a sign that is often used in practice.
5, Cerdip
Glass-sealed ceramic dual in-line package for ECL RAM, DSP (digital signal processor) and other circuits. Cerdip with glass window for UV erasure EPROM and internal microcomputer circuit with EPROM. Pin center distance 2.54mm, pin count from 8 to 42. In Japan, this package is represented as DIP-G (G is the meaning of the glass seal).
6, Cerquad
One of the surface mount packages, the sealed ceramic QFP, is used to encapsulate a logic LSI circuit such as a DSP. Cerquad with windows for encapsulating EPROM circuits. Heat dissipation than plastic QFP good, in the natural air-cooled conditions can allow 1. 5 ~ 2W power. But the cost of packaging than plastic QFP 3 to 5 times higher. Pin center distance from 1.27mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm and other specifications. The number of pins is from 32 to 368.
7, CLCC (ceramic leaded chip carrier)
With a ceramic chip carrier, one of the surface mount packages, the pin leads from the four sides of the package, showing a polygonal shape. With a window for the packaging of UV erasure EPROM and with EPROM microcomputer circuit. This package is also known as QFJ, QFJ-G (refer QFJ).
8, COB (chip on board)
On-chip chip packaging, one of the bare chip placement technology, the semiconductor chip transfer board mounted on the printed circuit board, the chip and the substrate of the electrical connection with the wire stitching method to achieve, the chip and the substrate electrical connection with wire stitching method, Resin coverage to ensure reliability. Although COB is the simplest bare chip placement technology, but its packaging density is far less than TAB and inverted chip welding technology.
9, DFP (dual flat package)
Bilateral pin flat package. Is a nickname for SOP (refer SOP). Previously this has been called, now basically no need.
10, DIC (dual in-line ceramic package)
Ceramic DIP (with glass seal) nickname (refer DIP).
11, DIL (dual in-line)
DIP of the DIP (refer DIP). European semiconductor manufacturers use this name.
12, DIP (dual in-line package)
Dual in-line package. One of the plug-in packages, the pin leads from both sides of the package, the packaging material has two kinds of plastic and ceramic. DIP is the most popular plug-in package, the scope of application, including standard logic IC, memory LSI, microcomputer circuit. Pin center distance 2.54mm, pin number from 6 to 64. The package width is typically 15.2mm. Some of the width of 7.52mm and 10.16mm package are called skinny DIP and slim DIP (narrow type DIP). But in most cases without distinction, simply referred to as DIP. In addition, ceramic DIP sealed with low melting glass is also known as cerdip (refer cerdip).
13, DSO (dual small out-lint)
Bilateral Pin Small Outline Package. SOP nickname (refer SOP). Some semiconductor manufacturers use this name.
14, DICP (dual tape carrier package)
Bilateral pin with package. TCP (with a carrier package) one. The pins are made on the insulating tape and are drawn from both sides of the package. As a result of the use of TAB (automatic with welding) technology, packaging shape is very thin. Commonly used in liquid crystal display drive LSI, but most of the products. In addition, 0.5mm thick memory LSI book package is in the development stage. In Japan, DICP is named DTP according to EIAJ (Japan Electronic Machinery Industry) standard.
15, DIP (dual tape carrier package)
Ibid. Japan Electronic Machinery Industry Standard for DTCP naming (refer DTCP).
16, FP (flat package)
Flat package. One of the surface mount packages. QFP or SOP (refer QFP and SOP). Some semiconductor manufacturers use this name.
17, flip-chip
Inverted chip. One of the bare chip packaging techniques, the metal bumps are made in the electrode region of the LSI chip, and then the metal bumps are connected to the electrode regions on the printed circuit board. The footprint of the package is essentially the same as the chip size. Is the smallest of all packaging technology, the thinnest one. However, if the thermal expansion coefficient of the substrate is different from that of the LSI chip, it will react at the junction, thus affecting the reliability of the connection. It is necessary to reinforce the LSI chip with resin and use a substrate material having substantially the same thermal expansion coefficient.
18, FQFP (fine pitch quad flat package)
Small pin center distance QFP. QFP (refer QFP), usually with a center distance of less than 0.65mm. Part of the conductor manufacturers use this name.
19, CPAC (globe top pad array carrier)
Motorola's name for BGA (refer BGA).
20, CQFP (quad fiat package with guard ring)
Four-side pin with protective ring flat package. One of the plastic QFP pins is shielded with a resin protection ring to prevent bending deformation. Before assembling the LSI on the printed board, cut the pin from the guard ring and make it a gull-wing (L-shape). This package is manufactured in the United States by Motorola. Pin center distance 0.5mm, the maximum number of pins 208 or so.
21, H- (with heat sink)
Indicates the tag with radiator. For example, HSOP represents SOP with radiator.
22, pin grid array (surface mount type)
Surface Mount Type PGA. Usually PGA for the plug-in package, the pin length of about 3.4mm. The surface mount PGA has a display-like pin on the underside of the package and has a length from 1.5mm to 2.0mm. The placement method uses a method of welding with a printed substrate, and is also referred to as a solder bump. Because the pin center distance is only 1.27mm, less than half of the plug-in PGA, so the package body can be made less than large, and the number of pins than the plug-in type (250 ~ 528), is a large-scale logic LSI package The The encapsulated substrate has a multilayer ceramic substrate and a glass epoxy printed base. Multi-layer ceramic substrate packaging has been practical.
23, JLCC (J-leaded chip carrier)
J-pin chip carrier. Refers to the other with the window CLCC and the windowed ceramic QFJ (refer CLCC and QFJ). Some semiconductor manufacturers use the name.
24, LCC (Leadless chip carrier)
No lead chip carrier. Refers to the four sides of the ceramic substrate only the electrode contact without pin surface mount type package. Is a high-speed and high-frequency IC package, also known as ceramic QFN or QFN-C (refer QFN).
25, LGA (land grid array)
Contact display package. That is, in the bottom of the production of array state of the electrode contacts. Assembly can be inserted into the socket. The ceramic LGA is now available for use with high-speed logic LSI circuits with 227 contacts (1.27mm center distance) and 447 contacts (2.54mm center distance). LGA compared with QFP, can be relatively small package to accommodate more input and output pins. In addition, due to the small impedance of the lead, for high-speed LSI is very applicable. But because the socket production complex, high cost, and now basically not very use. It is expected that there will be an increase in demand in the future.
26, LOC (lead on chip)
Chip lead package. One of the LSI packaging technologies, the front end of the lead frame is in a structure above the chip, and the solder bumps are formed near the center of the chip and electrically connected by wire stitching. The width of the chip accommodated in the same size package is about 1 mm as compared with the structure in which the lead frame is arranged near the side of the chip.
27, LQFP (low profile quad flat package)
Thin QFP. Refers to the package body thickness of 1.4mm QFP, the Japanese electronic machinery industry will be based on the development of the new QFP shape specifications used in the name.
28, L-QUAD
Ceramic QFP one. Packaging substrate with aluminum nitride, the base thermal conductivity than alumina 7 to 8 times higher, with good heat dissipation. The encapsulated frame is sealed with alumina, and the chip is sealed by potting, thereby suppressing the cost. Is a package developed for logic LSI that allows W3 power under natural air-cooled conditions. Has developed a 20-pin (0.5mm center distance) and 160-pin (0.65mm center distance) LSI logic package, and in October 1993 began to mass production.
29, MCM (multi-chip module)
Multi - chip components. A package in which a plurality of semiconductor bare chips are assembled on a wiring board. According to the substrate material can be divided into MCM-L, MCM-C and MCM-D three categories. MCM-L is an assembly using a conventional glass epoxy multilayer printed substrate. Wiring density is not very high, the cost is low. The MCM-C is a component that forms a multilayer wiring with a thick film technique and is made of ceramic (alumina or glass ceramic) as a substrate, similar to a thick film hybrid IC using a multilayer ceramic substrate. There was no significant difference between the two. Wiring density higher than MCM-L.
MCM-D is a thin film technology to form a multi-layer wiring to ceramic (alumina or aluminum nitride) or Si, Al as a substrate assembly. The wiring conspiracy is the highest among the three components, but the cost is also high.
30, MFP (mini flat package)
Small flat package. Plastic SOP or SSOP nickname (refer SOP and SSOP). Some semiconductor manufacturers use the name.
31, MQFP (metric quad flat package)
A classification of QFP according to the JEDEC (United States Joint Electronic Equipment Council) standard. Guideline center distance of 0.65mm, body thickness of 3.8mm ~ 2.0mm standard QFP (refer QFP).
32, MQUAD (metal quad)
US Olin company developed a QFP package. The substrate and the cover are made of aluminum, sealed with adhesive. In the natural air-cooled conditions can allow 2.5W ~ 2.8W power. Japan's Shin Kong Electric Industrial Company was licensed to begin production in 1993.
33, MSP (mini square package)
QFI's nickname (refer QFI), known as MSP at the beginning of development. QFI is the name prescribed by Japan Electronics Machinery Industry Association.
34, OPMAC (over molded pad array carrier)
Molded resin seal bump display carrier. US company name for molded resin sealed BGA (refer BGA).
35, P- (plastic)
Indicates the mark of the plastic package. Such as PDIP for plastic DIP.
36, PAC (pad array carrier)
Bump display carrier, BGA name (refer BGA).
37, PCLP (printed circuit board leadless package)
Printed circuit board leadless package. Japan Fujitsu's name for plastic QFN (plastic LCC) (refer QFN). Cited
There are two sizes of 0.55mm and 0.4mm. Is currently in the development stage.
38, PFPF (plastic flat package)
Plastic flat package. Plastic QFP nickname (refer QFP). Part of the LSI manufacturers use the name.
39, PGA (pin grid array)
Display pin package. One of the plug-in packages, the bottom of the vertical pins are arranged in a row. The packaging substrate is basically a multi-layer ceramic substrate. In the case where the material name is not specifically expressed, the majority is a ceramic PGA for high-speed large-scale logic LSI circuits. The cost is higher. The pin center distance is usually 2.54mm, the number of pins from 64 to 447 or so. In order to reduce costs, packaging substrates can be replaced with glass epoxy printed substrates. There are also 64 to 256 pins of plastic PG. In addition, there is a pin center distance of 1.27mm short pin surface mount type PGA (solder bump PGA). (refer surface mount type PGA).
40, piggy back
Pack the package. A ceramic package with a socket is similar to DIP, QFP, QFN. The program validation operation is used to evaluate the equipment with the microcomputer. For example, insert the EPROM into the socket for commissioning. This package is basically a custom product, the market is not very popular.
41, PLCC (plastic leaded chip carrier)
Leaded plastic chip carrier. One of the surface mount packages. The pin leads from the four sides of the package, showing a polygonal shape, is a plastic product. Texas Instruments Inc. is first used in 64k-bit DRAM and 256kDRAM, and now has been popular for logic LSI, DLD (or logic devices) and other circuits. Pin center distance 1.27mm, pin number from 18 to 84. J-shaped pin is not easy to deformation, easier to operate than the QFP, but the appearance of the inspection after welding more difficult. PLCC is similar to LCC (also known as QFN). Previously, the difference between the two is only the former with plastic, the latter with ceramics. But now there have been ceramic-made J-shaped package and plastic-made leadless package (marked as plastic LCC, PC LP, P-LCC, etc.), has been unable to distinguish. To this end, the Japanese Electronic Machinery Industry Association in 1988 decided to lead from the four sides of the J-shaped package called QFJ, on the four sides with electrode bumps called QFN (refer QFJ and QFN).
42, P-LCC (plastic teadless chip carrier) (plastic leaded chip currier)
Sometimes the name of the plastic QFJ, sometimes QFN (plastic LCC) nickname (refer QFJ and QFN). section
LSI manufacturers with PLCC with lead package, with P-LCC that no lead package to show the difference.
43, QFH (quad flat high package)
Four side pin thick flat package. Plastic QFP, in order to prevent the package body fracture, QFP body made thick (refer QFP). Some semiconductor manufacturers use the name.
44, QFI (quad flat I-leaded packgac)
Four side I-shaped pin flat package. One of the surface mount packages. The pins are drawn from the four sides of the package and are shown as I-down. Also known as MSP (refer MSP). The mounting is connected to the printed circuit board. As the pin has no protruding part, the footprint is less than QFP. Hitachi has developed and used this package for video analog ICs. In addition, Japan's Motorola's PLL IC also used this package. Pin center distance 1.27mm, pin number from 18 to 68.
45, QFJ (quad flat J-leaded package)
Four side J-pin flat package. One of the surface mount packages. The pins are drawn from the four sides of the package and are J-shaped downward. It is the name prescribed by Japan Electronic Machinery Industry Association. Pin center distance 1.27mm.
Materials are plastic and ceramic two. Plastic QFJ Most cases are called PLCC (refer PLCC) for microcomputer, door display, DRAM, ASSP, OTP and other circuits. Number of pins from 18 to 84.
Ceramic QFJ is also known as CLCC, JLCC (refer CLCC). The windowed package is used for UV erasure EPROM and microchip chips with EPROM. The number of pins is from 32 to 84.
46, QFN (quad flat non-leaded package)
Four side without lead flat package. One of the surface mount packages. Now known as LCC. QFN is the name prescribed by Japan Electronics Machinery Industry Association. Four sides of the package are equipped with electrode contacts, due to no lead, the placement area is smaller than the QFP, the height is lower than the QFP. However, when stress is generated between the printed substrate and the package, it can not be relieved at the electrode contact. So the electrode contacts are difficult to do as much as the QFP pins, generally from about 14 to about 100. Materials are made of ceramic and plastic. When there are LCC marks are basically ceramic QFN. Electrode contact center distance 1.27mm.
Plastic QFN is a low cost package of glass epoxy substrate substrates. Electrode contact center away from 1.27mm, there are 0.65mm and 0.5mm two. This package is also known as plastic LCC, PCLC, P-LCC and so on.
47, QFP (quad flat package)
Four side pin flat package. One of the surface mount packages, the pin leads from the four sides to the seagull wing (L) type. The substrate has three kinds of ceramic, metal and plastic. From the quantitative point of view, plastic packaging accounted for the vast majority. When the material is not specifically expressed, the majority of cases are plastic QFP. Plastic QFP is the most popular multi-pin LSI package. It is used not only for digital logic LSI circuits such as microprocessors and door displays, but also for analog LSI circuits such as VTR signal processing and audio signal processing. Pin center distance from 1.0mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm, 0.3mm and other specifications. 0.65mm Center distance from the specifications of the maximum number of pins 304.
Japan will be pin center distance of less than 0.65mm QFP called QFP (FP). But now the Japanese electronic machinery industry will QFP shape specifications were re-evaluation. In the pin center distance from the difference, but according to the thickness of the package body is divided into QFP (2.0mm ~ 3.6mm thick), LQFP (1.4mm thick) and TQFP (1.0mm thick) three.
In addition, some LSI manufacturers to pin center distance of 0.5mm QFP specifically known as shrink-type QFP or SQFP, VQFP. But some manufacturers to pin center distance of 0.65mm and 0.4mm QFP also known as SQFP, to make the name a little bit of confusion. The drawback of the QFP is that when the pin center distance is less than 0.65mm, the pin is easy to bend. In order to prevent pin deformation, several improved QFP varieties have been developed. (refer BQFP) with the four corners of the package with a tree finger; the GQFP with the resin guard ring covering the front of the pin (refer GQFP); set the test bumps in the package body to prevent deformation of the pins TPQFP (refer TPQFP) for testing in special fixtures. In the logic of LSI, a lot of development and high reliability are packaged in multi-layer ceramic QFP. Pin center distance of the smallest 0.4mm, the maximum number of pins 348 products have also come out. In addition, there is also a glass-sealed ceramic QFP (refer Gerqa d).
48, QFP (FP) (QFP fine pitch)
Small center distance QFP. Japan Electromechanical Industry Standard. QFP (refer QFP) with a center distance of 0.55mm, 0.4mm, 0.3mm, etc. is less than 0.65mm.
49, QIC (quad in-line ceramic package)
Ceramic QFP nickname. Some semiconductor manufacturers use the name (refer QFP, Cerquad).
50, QIP (quad in-line plastic package)
Plastic QFP nickname. Some semiconductor manufacturers use the name (refer QFP).
51, QTCP (quad tape carrier package)
Four side pin with carrier package. TCP encapsulation, forming pins on the insulating tape and leading out from the four sides of the package. Is a thin package using TAB technology (refer TAB, TCP).
52, QTP (quad tape carrier package)
Four side pin with carrier package. The name used by the Japan Electromechanical Industry Association in April 1993 for the form factor specified by QTCP (refer TCP).
53, QUIL (quad in-line)
QUIP (refer QUIP).
54, QUIP (quad in-line package)
Four-pin lead-in package. The pins are drawn from the two sides of the package and are bent four times in a row. Pin center distance of 1.27mm, when inserted into the printed substrate, insert the center distance becomes 2.5mm. So it can be used for standard printed circuit boards. Is a smaller package than standard DIP. Nippon Electric has adopted a number of packages in microcomputers such as desktop computers and home appliances. Materials are made of ceramic and plastic. Number of pins 64.
55, SDIP (shrink dual in-line package)
Shrink type DIP. One of the plug-in packages, the same shape as DIP, but the pin center distance (1.778mm) is less than DIP (2.54 mm)
And thus have this call. The number of pins is from 14 to 90. Also known as SH-DIP. Materials are made of ceramic and plastic.
56, SH-DIP (shrink dual in-line package)
Same as SDIP. Some semiconductor manufacturers use the name.
57, SIL (single in-line)
SIP alias (refer SIP). European semiconductor manufacturers to use the name of SIL.
58, SIMM (single in-line memory module)
Single register memory. And a memory module provided with an electrode in the vicinity of one side of the printed circuit board. Usually refers to the components inserted into the socket. Standard SIMM has a center distance of 2.54mm 30 electrode and the center distance of 1.27mm 72 electrode two specifications. SIMMs with 1 Mbit and 4 Mbit DRAM in SOJ package on single or double sides of printed substrates have been widely used in personal computers, workstations and other devices. At least 30 to 40% of the DRAM is installed in SIMM.
59, SIP (single in-line package)
Single in-line package. The pins are drawn from one side of the package and arranged in a straight line. The package is sideways when mounted on a printed circuit board. Pin center distance is usually 2.54mm, pin number from 2 to 23, most of the custom products. The shapes of the packages are different. And some of the same shape with the ZIP package called SIP.
60, SK-DIP (skinny dual in-line package)
A kind of DIP. Refers to the width of 7.62mm, pin center distance of 2.54mm narrow body DIP. Usually collectively referred to as DIP (refer DIP).
61, SL-DIP (slim dual in-line package)
A kind of DIP. Refers to the width of 10.16mm, pin center distance of 2.54mm narrow body DIP. Usually collectively referred to as DIP.
62, SMD (surface mount devices)
Surface mount device. Occasionally, some semiconductor manufacturers classified SOP as SMD (refer SOP).
63, SO (small out-line)
SOP nickname. Many semiconductor manufacturers in the world are using this nickname. (refer SOP).
64, SOI (small out-line I-leaded package)
Type I Pin Small Outline Package. One of the surface mount packages. Pin from the package leads to the side was I-shaped down, the center distance of 1.27mm. The footprint is less than SOP. Hitachi uses this package in analog ICs (motor-driven ICs). Number of pins 26.
65, SOIC (small out-line integrated circuit)
SOP nickname (refer SOP). There are many foreign manufacturers to use this name.
66, SOJ (Small Out-Line J-Leaded Package)
J-pin small package. One of the surface mount packages. Pin from the package on both sides of the lead down J-shaped, hence the name. Usually for plastic products, mostly for DRAM and SRAM and other memory LSI circuit, but most of the DRAM. Many of the DRAM devices packaged in SOJ are mounted on SIMM. The pin center distance is 1.27mm and the number of pins is from 20 to 40 (refer SIMM).
67, SQL (Small Out-Line L-leaded package)
The name used for the SOP according to the JEDEC (United States Joint Electronic Equipment Engineering Committee) standard (refer SOP).
68, SONF (Small Out-Line Non-Fin)
No heat sink for SOP. Same as usual SOP. In order to indicate the difference between the heat sink in the power IC package, the NF (non-fin) mark is intentionally added. Some semiconductor manufacturers use the name (refer SOP).
69, SOF (small Out-Line package)
Small form factor package. One of the surface mount packages, the pins are septa-shaped (L-shaped) from both sides of the package. Materials are plastic and ceramic two. Also called SOL and DFP.
SOP in addition to for the memory LSI, but also widely used in small scale ASSP and other circuits. In the input and output terminals do not exceed 10 to 40 areas, SOP is the most widely popular surface mount package. Pin center distance 1.27mm, the number of pins from 8 to 44.
In addition, SOPs with a pin center distance of less than 1.27mm are also called SSOPs. SOPs with a height of less than 1.27mm are also called TSOP (refer SSOP, TSOP). There is also a SOP with a heat sink.
70, SOW (Small Outline Package (Wide-Jype))
Wide body SOP. Some semiconductor manufacturers use the name.